Pin No.
|
Mark
|
I/O
|
Function
|
1
|
DECK2
|
I
|
Tape mecha condition input (Half2/Reci_F/Mode/Reci_R)
|
2
|
KEY3
|
I
|
Key 3 input
|
3
|
KEY2
|
I
|
Key 2 input
|
4
|
KEY1
|
I
|
Key 1 input
|
5
|
V_JOG
|
I
|
Volume jog A-D detection input
|
6
|
CHG_AD2
|
I
|
(Position/ bottom) Chngr sw A-D detection input 2
|
7
|
CHG_AD1
|
I
|
(Open Clamp) Chngr sw A-D detection input 1
|
8
|
CDRST
|
O
|
CD reset output
|
9
|
STATUS
|
I
|
CD signal processor status input (INV)
|
10
|
LM_L
|
I
|
Level meter left
|
11
|
LM_R
|
I
|
Level meter right
|
12
|
ST/DO/SQCK
|
I/O
|
Tuner if data/stereo input and CD subcode clock output
|
13
|
SD
|
I/O
|
Tuner signal detect input
|
14
|
SUBQ
|
I
|
CD subcode data input (INV)
|
15
|
RDS_CLK
|
I
|
RDS clock input
|
16
|
RDS_DAT
|
I
|
RDS data input
|
17
|
CNVSS
|
-
|
Flash mode terminal (connect to ground)
|
18
|
/RESET
|
-
|
RESET input
|
19
|
XCOUT
|
-
|
32.768 kHz sub clock
|
20
|
XCIN
|
-
|
32.768 kHz sub clock
|
21
|
VSS
|
-
|
Ground (0V)
|
22
|
XIN
|
-
|
4.19 MHz main clock
|
23
|
XOUT
|
-
|
4.19 MHz main clock
|
24
|
VCC
|
-
|
Power supply (+5V)
|
25
|
MBP1
|
O
|
MPU beat proof output 1
|
26
|
MBP2
|
O
|
MPU beat proof output 2
|
27
|
MCLK/ PLLCK
|
O
|
CD command clock output/ tuner PLL clock output
|
28
|
MDATA/ PLLDA
|
O
|
CD command data output/ tuner PLL data output
|
29
|
RMT
|
I
|
Remote control input
|
30
|
BLKCK
|
I
|
CD block clock input (INV)
|
31
|
MLD/ PLLCE
|
O
|
CD command load output/ tuner PLL chip enable
|
32
|
SYNC
|
I
|
AC failure detect input
|
33
|
DCDET
|
I
|
DC detect input
|
34
|
CHG_CCW
|
O
|
Changer motor CCW output
|
35
|
CHG_CW
|
O
|
Changer motor CW output
|
36
|
CHG_HLF
|
O
|
Changer half drive output
|
37
|
CHG_PGR
|
0
|
Changer plunger output
|
38
|
CHG_SW2
|
I/O
|
CD changer SW2 input
|
39
|
CHG_SW1
|
I/O
|
CD changer SW1 input
|
40
|
/RESTSW
|
I
|
CD limit SW input for the most inner point (Active Low)
|
41
|
PCONT
|
O
|
Main transformer control output
|
42
|
LED_3
|
O
|
Backlight LED3 control
|
43
|
LED_2
|
O
|
Backlight LED2 control
|
44-80
|
SEG38 - SEG2
|
O
|
Segment drive output (Anode drive output)
|
81
|
REG8/SEG1
|
O
|
Segment drive output. Regional/Function setting use
|
82-88
|
REG7/GRID7- REG1/GRID1
|
O
|
Segment drive output (Anode drive output)For regional setting/ function selection use
|
89
|
VEE
|
-
|
Power supply (-30V)
|
90
|
REG_IN
|
I/O
|
Region and function setting input and eeprom chip select output
|
91
|
EE_CS
|
O
|
EEPROM chip select
|
92
|
SER5
|
O
|
(EE_CLK/EX1_CLK)
|
93
|
SER4
|
O
|
(MK_CLK_)
|
94
|
SER3
|
O
|
(EE_DAT/EX1_DAT)
|
95
|
SER2
|
O
|
(ASP_CLK)
|
96
|
SER1
|
O
|
(ASP_DATA /MK_DAT)
|
97
|
AVSS
|
-
|
Analog ground (0V)
|
98
|
VREF
|
-
|
Reference for A-D
|
99
|
TPS
|
I
|
TPS/Chrome1/Chrome2
|
100
|
DECK1
|
I
|
Tape mecha condition input (Half1/Mode/Photo1/Photo 2)
|